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Job description
River AI in Palo Alto or Austin is seeking an exceptional AI compiler engineer to bridge PyTorch graphs to our custom ISA. You will own kernel algorithms, IRs, and even ISA tweaks, collaborating with researchers and silicon architects.
You will design MLIR-based lowering passes, implement backends for our hardware, and optimize performance across the stack. The role requires a strong CS background and teamwork.
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Worksite address
palo alto, CA, 94306, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.