About this opportunity
Conductor lists this Architect- Memory Subsystem opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
We’re looking for memory subsystem architects to contribute and own aspects of the memory subsystem for the largest and highest bandwidth memory system ever built to date. This includes the distributed memory fabric, memory controllers, interface with the XPUs/compute complex, etc.
Ideal Candidates:
Ideal candidates will have:
Deep knowledge and hands-on experience in the design and implementation of memory sub-systems
Understand LLM inference workloads and what the impact of that for the memory subsystem is
Understand the benefits and limitations of memory tiering for various workloads
Nice to Have:
Experience with CXL and other memory pooling protocols
Experience with design and implementation of memory controllers
Experience with processing in memory and other "unique" memory subsystem projects and efforts
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.