About this opportunity
Apple Inc. lists this ASIC Design Engineer - Memory Systems & DRAM opportunity in santa clara, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Apple Inc. in Santa Clara, CA, is seeking an engineer to join a team focused on ASIC design for next‑generation memory systems. The role emphasizes architecture research, RTL/micro-architecture work, and characterizing performance of high‑speed memory subsystems.
The candidate will contribute to DRAM interfaces, calibration techniques, and SOC memory hierarchies, collaborating with performance teams to optimize power, area, and speed.
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Worksite address
santa clara, CA, 95053, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.