About this opportunity
Anysilicon lists this ASIC Design Engineer – New College Grad 2026 opportunity in santa clara, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Job Description:
NVIDIA is seeking a Logic Design Engineer to join its CPU Logic Design Team, focusing on CPU on-chip interconnect networks, coherency, and last-level caches. This role involves micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure, contributing to innovative product lines in consumer graphics, self-driving cars, and artificial intelligence.
Responsibilities
Own and deliver a specific unit on the chip in a timely manner.
Write high-performance, low-power RTL code.
Conduct synthesis and timing closure processes.
Document design specifications and processes.
Collaborate with the verification team to ensure unit correctness.
Work with implementation teams to meet timing, area, performance, and power goals.
Assist in timing closure of super units.
Qualifications
Recent graduate with a BS or MS in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience).
Experience in processor or high-performance semiconductor designs.
Skills
Expertise in Verilog and ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, and lab debug.
Strong background in computer architecture, cache coherency, or high-speed interconnects.
Effective communication and interpersonal skills.
Experience mentoring junior engineers and interns is a plus.
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Worksite address
santa clara, CA, 95053, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.