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NVIDIA Gruppe

ASIC Design Engineer

santa clara, CA

Check who can apply and the requirements below before continuing.

About this opportunity

NVIDIA Gruppe lists this ASIC Design Engineer opportunity in santa clara, California. Review the employer’s description below for duties, qualifications and application requirements.

Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

At NVIDIA, our passion for innovative technology and dedication to excellence guide us. As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support everything from consumer graphics to self-driving cars and artificial intelligence. You will be part of a skilled engineering team pushing the boundaries of computing’s future.

What you’ll be doing

Drafting microarchitecture documents and implementing high-performance, area, and power-efficient RTL to meet strictly defined development targets and specifications.

Analyzing architectural trade-offs based on features, performance requirements, and area/power constraints.

Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis/timing‑clean builds.

Collaborating closely with architects, other designers, and pre‑ and post‑silicon verification teams to deliver world‑class RTL builds.

Working on a diverse list of IPs, including GPU’s time distribution system, engine scheduler, interrupt controllers, and copy engines.

Assisting the silicon bring‑up team in debugging and post‑silicon validation activities.

What we need to see

BS/MS Degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.

2+ years of relevant RTL design work experience.

Strong in micro‑architecture and RTL development (Verilog), as well as entire front‑end flows including logic synthesis, power, and timing analysis.

Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.

Strong coding skills in Perl, Python, or other industry‑standard scripting languages.

Excellent interpersonal skills and a proven ability to work well in a team.

Ways to stand out from the crowd

Strong C/C++ skills.

Experience in multi-clock domains and asynchronous logic, interface protocols and arbitration schemes.

Outstanding debugging, problem-solving, and analytical abilities.

Salary and benefits

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $116,000 – $189,750 for Level2, and $136,000 – $218,500 for Level3. You will also be eligible for equity and benefits.

Equal Opportunity Employment

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. We do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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Worksite address

santa clara, CA, 95053, US

Who can apply

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