About this opportunity
Google lists this ASIC Physical Design Engineer — Full-Chip Implementation opportunity in mountain view, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Google is hiring for a lead Physical Designer to drive all aspects of ASIC RTL2GDS implementation and full-chip physical design. You will work on high-performance, power-efficient hardware that powers Google's products, collaborating across design, verification, and infrastructure teams.
The role requires a degree in Electrical Engineering or equivalent, 4+ years in physical design, and hands-on experience with synthesis and PnR tools, STA, and sign-off optimization.
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Worksite address
mountain view, CA, 94039, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.