About this opportunity
Anysilicon lists this ASIC SOC Methodology Design Engineer, AI Hardware opportunity in austin, Texas. Review the employer’s description below for duties, qualifications and application requirements.
Job description
ASIC SOC Methodology Design Engineer, AI Hardware
Join Tesla's AI Hardware team, a leader in artificial intelligence innovation, focusing on the development of advanced AI inference chips and the Dojo supercomputer system. This role is pivotal in enhancing Tesla's machine learning capabilities, powering technologies like Full Self-Driving and the Optimus robot. You will be responsible for developing EDA methodology flows for SOC design signoff, ensuring computational efficiency and performance in AI-driven automotive solutions.
Responsibilities:
Own RTL-to-PD integration and Spyglass lint sign-off flow, including filelist methodology and violation triage.
Set up, run, and maintain Spyglass CDC sign-off flows, configure DFx mode, and drive fixes with design teams.
Define and maintain RTL-to-SDC timing-constraint methodology across diverse IP blocks.
Manage Spyglass RDC sign-off flows, perform reset-domain analysis, and introduce robust reset scenarios with verification teams.
Lead Conformal LEC formal equivalence checking and conduct sign-off reviews.
Automate and enhance methodology flows using TCL and Python scripting.
Collaborate with RTL design, DFT, timing, and physical design groups to scale methodologies across the full SOC.
Qualifications:
Degree in Electrical Engineering, Computer Engineering, or equivalent experience.
2+ years of industry experience with digital design EDA tools.
Hands‑on experience with Spyglass, Conformal LEC, or equivalent tools.
Understanding of clock domain crossings and synthesis fundamentals.
Proficiency in TCL and/or Python scripting.
Familiarity with SDC constraint development.
Elementary understanding of DFx/DFT scan modes.
Experience with Synopsys and Cadence EDA tool ecosystems.
Exposure to RTL filelist management at SOC scale.
Experience with physical design flows.
Skills:
Expertise in EDA tools like Spyglass and Conformal LEC.
Strong scripting skills in TCL and Python.
Knowledge of timing constraints and reset synchronization.
Ability to collaborate effectively with cross‑functional teams.
#J-18808-Ljbffr
Worksite address
austin, TX, 78716, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.