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Micron Memory Malaysia Sdn Bhd

Design Verification Engineer - DRAM & Memory Architectures

boise, ID

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About this opportunity

Micron Memory Malaysia Sdn Bhd lists this Design Verification Engineer - DRAM & Memory Architectures opportunity in boise, Idaho. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Micron Technology, Inc. in Boise, Idaho, is seeking a Design Verification Engineer to validate DRAM and emerging memory architectures, ensuring speed, reliability and correctness from concept to silicon.

You will build digital and mixed-signal test benches, develop patterns and coverage, debug failures, and collaborate with global engineering teams to drive silicon verification. The role requires a degree in Electrical or Computer Engineering and hands-on experience with SystemVerilog, UVM, and

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Worksite address

boise, ID, 83708, US

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