This job is closed
Applications are no longer available for this announcement. Explore current related opportunities below.
Job description
Wipro is seeking a Design Verification Engineer to join its Interface IP DV team in a fast-paced environment. You will validate architecture requirements across full hardware-software stacks for IP subsystems such as PCIe, Ethernet, and CPU interfaces, driving verification that meets the IP specifications.
The role requires hands-on SystemVerilog/UVM, testbench development, and collaboration with RTL, software, and emulation teams to ensure thorough verification and performance across scenarios.
#J-18808-Ljbffr
Worksite address
san jose, IL, 62682, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.