About this opportunity
Amazon lists this DFT Design Engineer, Machine Learning Acceleration opportunity in austin, Texas. Review the employer’s description below for duties, qualifications and application requirements.
Job description
DFT Design Engineer, Machine Learning Acceleration
Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing hardware in our data centers, including AWS Inferentia and Trainium systems—our custom-designed machine learning inference and training servers. Our success depends on world-class server infrastructure as we handle massive scale and rapidly integrate emerging technologies. We're looking for an ASIC DFT Design Engineer to help us trailblaze new technologies and architectures while ensuring high design quality and making the right trade-offs.
Key job responsibilities
Define and develop state-of-the-art Design for Test (DFT) architectures for advanced technology nodes
Work closely with block designers and physical design (PD) team to implement highly efficient DFT solutions
Perform RTL coding and Verification using Verilog/System Verilog
Utilize industry standard DFT tools to create high coverage and cost-effective test patterns to target advanced silicon defects
Participate in Silicon debug efforts alongside ATE and System teams
Communicate and work with team members across multiple disciplines
Basic Qualifications
Bachelor's degree in Electrical or Communications Engineering or a related field
5+ years of practical DFT experience with complex SoC designs in advanced technology nodes
Experience with standard tools and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
Experience with automation script development
Preferred Qualifications
Master's degree in Electrical or Communications Engineering or a related field
Practical experience developing STA constraints for DFT modes and working directly with PD teams to close timing
Experience with RTL coding and design verification (DV) flows
Experience with gate-level simulation setup and debug with SDF
Strong programming and scripting skills in Perl, Python or Tcl
Practical experience with silicon debug and yield optimization
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at .
USA, TX, Austin - 136,000.00 - 184,000.00 USD annually
Important FAQs for current Government employees
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Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
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Worksite address
austin, TX, 78716, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.