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Job description
SK hynix America seeks a Director of 3D Stacked Logic Design to lead high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT. You will drive RTL implementation, coordinate foundry verification, and build IP infrastructure while collaborating with U.S.-based customers to enable DRAM-on-Logic configurations.
You will manage cross-functional teams, strengthen market leadership in digital IP design, and deliver services that support co-design of 3D-stacked DRAM logic dies with
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.