About this opportunity
Cadence Design Systems lists this Director, SerDes IP Systems Engineering opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Cadence Design Systems in San Jose, CA, is seeking a Design Engineering Architect to drive advanced semiconductor design solutions and architectures. You will collaborate with cross-functional teams to deliver state-of-the-art EDA software and hardware capabilities that empower our customers to create innovative products.
Cadence emphasizes equal opportunity employment and offers a comprehensive benefits program with competitive compensation in California, including incentive opportunities and a
#J-18808-Ljbffr
Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.