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Tarana Wireless

FPGA Design Engineer

san francisco, CA

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About this opportunity

Tarana Wireless lists this FPGA Design Engineer opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Overview

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Join the Team That's Redefining Wireless Technology

At Tarana, we’re more than just a fast-growing tech company—we’re a team of bold innovators on a mission to revolutionize broadband. Our groundbreaking Fixed Wireless Access technology is delivering fiber-class internet speeds worldwide, bridging the digital divide in ways previously thought impossible. We’re looking for exceptional FPGA engineers ready to dive into high-impact projects alongside some of the brightest minds in the industry. If you’re passionate about digital design, solving complex problems, and building products that make a global difference, this is the opportunity you’ve been waiting for.

As part of our FPGA Design Team , you’ll contribute to the development and testing of advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms. You’ll play a vital role in building the foundation of tomorrow’s wireless infrastructure.

What You’ll Do

Design, implement, and debug logic for large FPGAs

Simulate, test, and validate logic at both module and system levels

Participate in system-level integration and troubleshooting

Collaborate across hardware and software teams for smooth integration

Create and maintain design documentation and review test outcomes

What You'll Need

B.S. in Electrical Engineering (M.S. preferred)

2+ years of FPGA logic design experience

Expertise in high-speed digital design

Hands-on experience with Xilinx Vivado or Intel Quartus tools

Proficient in Verilog/SystemVerilog, simulation, and FPGA implementation

Familiarity with FPGAs, ICs, and tools like Vivado Chipscope or Quartus SignalTap

Comfortable with lab equipment and scripting tools (e.g., Python)

Bonus Points For

Experience with wireless PHY layer design (e.g., modulation/demodulation)

Implementation of DSP and arithmetic algorithms in an FPGA

Familiarity with C or MATLAB programming

What we offer

We don’t just build next-gen wireless technology — we build people.

The salary range for this position is: $120,000 to 155,000

Compensation will be determined based on several factors including, but not limited to: skill set, years of experience and the employee’s geographic location.

Tarana provides competitive benefits to employees in this role including: Medical, dental and vision benefits, 401K match, flexible time off and stock option.

About Us

Tarana’s mission is to accelerate the deployment of fast, affordable, and reliable internet access around the world. Through a decade of R&D and over $400M of investment, the Tarana team has created and continues to enhance a suite of next-generation fixed wireless access (ngFWA) technologies. Its unique ngFWA platform delivers game-changing advances in broadband economics in mainstream and underserved markets, using both licensed and unlicensed spectrum. Tarana’s ngFWA technology has been embraced by more than 300 service providers in 24 countries. Tarana is headquartered in Milpitas, California, with additional research and development in Pune, India. Learn more at

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Engineering and Information Technology

Industries

Wireless Services, Telecommunications, and Communications Equipment Manufacturing

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Worksite address

san francisco, CA, 94199, US

Who can apply

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