Global Director, Ultra-Low Power ASIC Physical Design

Job description

Nokia seeks an experienced Director of ASIC Physical Design to strategically lead global physical design engineering teams. Drive end-to-end PD from RTL to GDSII with emphasis on ultra-low power and PPA on latest nodes.

Define advanced methodologies and manage multi-site teams across USA, India, and Italy to ensure first-pass silicon success. The candidate will mentor teams, implement Customer Owned Tooling flows, optimize flows for new processes, and collaborate with architecture, RTL, CAD, and

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Worksite address

san jose, CA, 95199, US

Who can apply

Review the original listing for work authorization, qualifications and employer requirements.