About this opportunity
Broadcom Inc. lists this Hardware Engineer opportunity in irvine, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Job Overview
Broadcom's Central Engineering Design Correlation team is looking for an energetic and self‑driven professional to join our team to help with silicon technology evaluation in advanced process nodes for IP and product designs. Our mission is to assess foundry technology offerings, help define new technology platforms for IP and product designs, risk assessment, and provide Broadcom’s design communities with insights into design and process‑technology interactions especially during co‑development in advanced process nodes.
The candidate will have the opportunity to participate in new technology platform definition, PPAC (power performance area cost) assessment and benchmarking, test structure design, silicon characterization and model‑to‑silicon correlation in most advanced foundry technology nodes. The candidate will work closely with experts in CMOS process technology, device & modeling, process and device reliability, digital & analog IP design, design sign‑off flow for timing and power, CAD & EDA tools, as well as chip designers from various product lines.
Location
The position is in Broadcom’s Irvine facility in California.
Responsibilities
Support IP and Chip teams with technology evaluation including reliability and design enablement.
Perform test structure layout, verification, extraction, simulation, and silicon evaluation.
Conduct cross‑functional quality assurance of designs and tape‑outs.
Ensure EDA & RCX tool quality and predictability.
Prepare custom device infrastructure readiness and robustness.
Engage in collaborative team projects involving design, platform technology, operations teams, and foundry partners.
Qualifications
Degree in Electrical Engineering, Materials Engineering, Engineering Physics or related field with 8+ years of related experience after BS or 6+ years after MS or 3+ years after PhD with recent work in advanced FINFET (or GAA) nodes.
Strong background in advanced CMOS technology (FEOL, MEOL, BEOL) including understanding of design‑technology interactions.
Proficient in interacting with design teams and foundry partners.
Familiarity with analog and digital design flows and CAD tools.
Hands‑on experience with device/circuit level test structure designs, verification (DRC, LVS), extraction, spice simulation, silicon characterization (DC/AC/RF) and data analysis.
Extremely detail‑oriented with strong analytical, communication and multitasking skills.
Mix of hands‑on and project management skills.
Compensation and Benefits
The annual base salary range for this position is $108,000 - $172,800. You will be eligible for a discretionary annual bonus, a new hire equity grant, and annual equity awards.
Broadcom offers a comprehensive benefits package: medical, dental and vision plans; 401(K) participation with company matching; Employee Stock Purchase Program; Employee Assistance Program; company paid holidays; paid sick leave and vacation time; and Paid Family Leave and other leaves of absence in accordance with applicable laws.
EEO Statement
Broadcom is a proud equal‑opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We also consider qualified applicants with arrest and conviction records consistent with local law.
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Worksite address
irvine, CA, 92713, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.