About this opportunity
Micron Technology, Inc. lists this HBM SoC Physical Design Engineer – PPA & Tape-out opportunity in folsom, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Micron Technology, Inc. is seeking a SoC Physical Design Engineer in the Heterogeneous Integration Group to drive implementation from netlist to GDSII, collaborating with RTL, verification, DFT, IP providers, packaging, and manufacturing to deliver robust PPA and post-tape-out signoff collateral.
This hands-on role offers ownership of blocks or top-level integration across product generations and opportunities to enable AI-driven workflows within PD/STA methodologies, focusing on
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Worksite address
folsom, CA, 95630, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.