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Job description
Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018, the company’s breakthrough data transport and acceleration technology is ushering in a new era of connectivity and capabilities in the vehicle and at the edge, including highly reliable autonomy, over-the-air servicing and AI-backed applications.
Ethernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds’ leading technology investors, having secured $154M ($90+M Series-B and $64M Series-A) in total funding to date:
(financial backers include: Porsche SE, Qualcomm, AMD, Western Digital, Maverick Silicon, Socratic Partners, Conduit Capital, and CDIB-TEN Capital)
Ethernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025.
With talented employees on 4 continents, we have filed 50+ patents to date.
Join Ethernovia’s team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles, robots and intelligent machines. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive cutting edge designs from concept to silicon to the future of mobility.
Head of Product Development Engineering
Summary:
The Head of Product Development Engineering will be responsible for taking Ethernovia’s products from NPI to HVM.
This position requires a leader who is hands-on with semiconductor product development . You will bridge the gap between world-class networking chip designs and high-volume, automotive-grade silicon manufacturing. The position is based in San Jose, CA.
Key Responsibilities:
End-to-end producttestand hardware ownership from pre-silicon to post-silicon, working with Arch, Design, SW/FW, DFT, System, Test (ATE/BI/SLT) and Q&R.
Execute NPI bring-up for high-speed Ethernet switch and PHY products ensuring signal integrity and power/performance standards are maintained at scale.
Drive the execution of the manufacturing flow from wafer starts to sample delivery. Own test strategy across wafer test, final test and system level test.
Own characterization, ATE to system correlation, productization and manufacturing specs and margins (transistor to pmic, part to part, aging and grr)
Own yield improvement across process/package/test, drive test time and test cost reduction , while maintaining and meeting automotive quality requirements.
Required Experience & Skills:
Bachelor's orMaster's degree in Electrical Engineeringor a related technical field
12+ years of experience in fabless semiconductor operations , specifically for complex, high-performance SOCs or networking ICs.
Must have direct experience with ATE and SLT testing, characterization , ATE to system correlation, productization and silicon/package qualification.
Must have direct experience working with foundries, assembly houses, test houses, and OSATs in the development of high-volume products from NPI through HVM.
Expertise with iJTAG, Scan, MBIST, Sensor, SerDes, LSIO/HSIO testing on ATE, bare-metal, functional DVFS and benchmark testing at SLT and security fusing.
Experience productizing high-speed communications chips using ATE and System characterization and correlation data, balancing PPY (power/perf/yield)
Experience navigating the Automotive electronics ecosystem, including IATF 16949, ISO 26262, Safe launch and PPAP (Production Part Approval Process).
Experience working in fast paced start-up environment building cutting edge products.
Technical Leadership & Skills:
Understanding of high-bandwidth data-path products (Ethernet, Switching, or high-speed SerDes ).
Expert level experience with yield management systems, dataanalysis,scripting tools, and statistical data analysis using JMP.
Understanding of product life cycle from concept to end of life and leading pre-silicon review and readiness to enable seamless post-silicon bring-up
Nice to Have (The "Competitive Advantage"):
Familiarity with their latest FinFET process node, and QFN, LGA/BGA assembly process for automotive products.
Experience delivering high speed SerDes products to Tier-1 automotive OEMs.
Experience managing contractors and leadership experience.
What You Can Expect From Ethernovia:
Technology depth and breadth expansion that can’t be found in a large company
Opportunity to grow your career as the company grows
Pre IPO stock options
Cutting edge technology
World class team
Flexible hours
Medical, dental and vision insurance for employees
Salary Range:
The actual offered base salary for U.S. locations will vary depending on factors such as work location, individual qualifications, specializations, years of experience, skills, job-related knowledge, and internal equity. The annual salary range for this position is $220,000 - $280,000. The compensation package will also include incentive compensation in the form of pre-IPO ISO options, in addition to base salary and a full range of medical and other benefits.
* Principals Only (No Agencies)
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.