About this opportunity
ovt lists this Innovative Image ISP Design Engineer opportunity in irvine, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
OVT is seeking an engineer to design and implement sensor timing control logic and contribute to ISP system-level integration in Irvine, California. The role involves chip-level architecture, analog interfaces, and image data pipelines, with close collaboration across CIS and sensor teams.
The position requires hands-on RTL design with Verilog/SystemVerilog, scripting in Python/Perl, and experience optimizing PPA.
#J-18808-Ljbffr
Worksite address
irvine, CA, 92713, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.