About this opportunity
Anysilicon lists this Lead Engineer – Hardware Development opportunity in san diego, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
AeroVironment (AV) is looking for a Lead Hardware Engineer to join its EE/RF Engineering team in San Diego, CA, focusing on the Titan Counter-UAS program. The role involves leading hardware development, production, and sustaining engineering for ruggedized RF and electronic subsystems, requiring expertise in RF hardware and defense electronics standards.
Responsibilities:
Lead design, review, and release of schematics and PCB layouts for RF systems.
Manage BOM generation, component selection, and revision management.
Conduct signal integrity, power integrity, and RF link budget analysis.
Oversee design reviews and ensure design traceability to system requirements.
Design and validate RF front-end circuits and support embedded hardware integration.
Review firmware interfaces in coordination with the firmware team.
Support contract manufacturer relationships and manage hardware repair pipelines.
Develop and maintain test procedures and assembly work instructions.
Provide technical mentorship to junior engineers and technicians.
Coordinate with management on hardware schedules and risk reporting.
Interface with vendors to manage component lead times and qualification activities.
Qualifications:
B.S. or M.S. in Electrical Engineering, RF Engineering, or related field.
6+ years of hardware design experience.
Expertise in RF/microwave circuit design.
Proficiency with EDA tools, preferably Altium Designer.
Hands-on experience with lab equipment like spectrum analyzers and oscilloscopes.
Knowledge of PCB manufacturing standards and military environmental test standards.
Experience supporting contract manufacturers through NPI and production phases.
Skills:
Leadership and team coordination skills.
Strong analytical and problem-solving abilities.
Effective communication skills for cross-functional collaboration.
Familiarity with ERP/PLM systems for BOM and change management.
Tell us what you're building and we'll recommend qualified vendors for your project.
ASIC Design Services
Verification
Packaging & Wafer
Semiconductor IP
Find the Right Semiconductor Partner
Tell us what you're building and we'll recommend qualified vendors for your project.
ASIC Design Services
Verification
Packaging & Wafer
Semiconductor IP
Work Email
Free No obligation Response within 24 hours
#J-18808-Ljbffr
Worksite address
san diego, CA, 92189, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.