About this opportunity
TSMC - Taiwan Semiconductor Manufacturing Company Limited lists this Lead PD Verification for CPU Blocks & Tapeouts opportunity in california, Missouri. Review the employer’s description below for duties, qualifications and application requirements.
Job description
TSMC Technology Inc. is seeking a highly experienced Physical Design Verification Lead to drive end-to-end verification for CPU blocks on advanced N2/N7 nodes at a customer site in the South Bay area.
You will lead the verification flow, address timing, power, and parasitic challenges, and mentor junior engineers. You will collaborate with STA teams for ECOs, optimize CTS and Place & Route, and ensure successful production tapeouts with robust DRC/LVS/ERC checks.
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Worksite address
california, MO, 65018, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.