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Micron Technology, Inc

Member of Technical Staff, SoC Power and Physical Architect, Next-generation HBM Architecture

folsom, CA

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About this opportunity

Micron Technology, Inc lists this Member of Technical Staff, SoC Power and Physical Architect, Next-generation HBM Architecture opportunity in folsom, California. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Member of Technical Staff, SoC Power and Physical Architect, Next-generation HBM Architecture

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications.

Responsibilities

Define clocking architectures, power sequencing, power delivery, and on-die signal interfaces.

Define and analyze on-die power delivery networks (PDN) and full-chip thermal implications, including power hot-spot identification and mitigation.

Define DFT architectures (e.g., scan chain topology) and set verification requirements.

Define SoC floorplans in collaboration with physical designers.

Compose and maintain clear SoC physical documentation.

Preferred Qualifications

Experience with circuit design, including IP interface requirements, power delivery behavior, and clocking constraints.

Familiarity with chip-level thermal analysis and power hotspot mitigation strategies.

Strong experience reasoning about interconnects and frequency vs. energy/power tradeoffs.

Experience with synthesis, static timing analysis, and relevant EDA toolsets: PrimePower, PrimeShield, RedHawk, and ICC2.

Minimum Qualifications

Experience with high-bandwidth memory (HBM) architectures.

Ability to influence decisions through data-driven analysis and clear communication.

A Masters or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.

8+ years of industry experience delivering SoC hardware designs.

Job Profile(s)

Systems Design Engineering SMTS

Compensation

The US base salary range for this full-time position is $191,000.00 - $334,000.00 per year. Additional compensation may include benefits, bonuses and equity. The compensation details listed here reflect the base salary only, and do not include bonus, equity, or benefits.

Benefits

Micron offers medical, dental and vision plans, paid family leave, paid time‑off, paid holidays, and other benefit programs. For complete details see the Benefits Guide posted on Micron’s website.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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Worksite address

folsom, CA, 95630, US

Who can apply

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