About this opportunity
NVIDIA Corporation lists this New Grad ASIC Physical Design Engineer — Netlist & Timing Focus opportunity in northern, Kentucky. Review the employer’s description below for duties, qualifications and application requirements.
Job description
NVIDIA seeks an ASIC Physical Design Engineer, Netlisting to join a dynamic, growing team in Santa Clara, CA. You will contribute to high-frequency and low-power CPUs, GPUs, and SoCs at block, cluster, or full-chip levels, focusing on netlist quality and verification processes.
The role requires advanced degrees or equivalent experience, strong knowledge of formal verification, RTL design, and scripting skills. Competitive salary and equity are offered. #J-18808-Ljbffr
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.