This job is closed
Applications are no longer available for this announcement. Explore current related opportunities below.
Job description
A technology company in California is seeking a motivated Digital Design Engineering Intern to join the Internal R&D team. In this internship, you will collaborate with engineers to develop high-speed SerDes and DSP-based architectures. Responsibilities include implementing RTL modules, developing behavioral models, and supporting verification efforts. Candidates should be pursuing a degree in Electrical Engineering or related fields, with skills in SystemVerilog, MATLAB, and Python. This role offers an hourly pay of $22, starting in May/June.
#J-18808-Ljbffr
Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.