About this opportunity
The Consensus lists this Performance Verification Engineer - High-Throughput ASICs opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Etched is hiring a Design Verification Engineer to join our Systems/Performance Verification team. You will validate custom IPs powering our chips, including systolic arrays, DMA engines, and NoCs, ensuring robustness and silicon-readiness.
You will collaborate with architects, RTL designers, and SW/FW teams to validate correctness and performance across the hardware-software stack, tackling complex verification challenges with creativity.
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.