About this opportunity
Conductor lists this Physical Design Engineer opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
We’re looking for physical design engineers to help manage and execute the physical design process for the various dies that comprise our A-0 and A-1 systems. This will involve deciding what to do in-house and outsource, and then managing the outsourced process and integrating it with the in-house flow and effort.
Ideal Candidates:
Ideal candidates will have:
Hands-on experience with the physical design process for at least one block in multiple advanced node tapeouts
Ability to understand what PPA limiters are from RTL and coordinate with microarchitects to change the RTL to improve/fix them
Experience both with in-house and outsourced physical design flows
Nice to Have:
Experience with physical design process for multi-die/multi-chiplet/MCM designs
Experience with physical design process for reticle-max or near reticle max designs
Experience with very high power density chips
Experience with the physical design process for AI chips
Experience with the physical design process of analog and mixed signal blocks and macros
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.