About this opportunity
Langham Recruitment lists this PIC Test Manager opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Full-Time | Hybrid | $250K–$260K + Equity + Benefits
We are looking for a senior PIC Test Manager with strong expertise in wafer-level optical and electrical testing for Photonic Integrated Circuits (PICs).
This position owns the wafer-level test strategy across the entire product lifecycle—from initial silicon bring-up through high-volume manufacturing (HVM). You will drive test architecture, yield learning, and manufacturing readiness while working closely with design, process integration, foundry, and OSAT partners to scale advanced photonic technologies into production.
What You’ll Do
Own and define wafer-level PIC test strategy across multiple product lines through HVM
Design scalable, high-throughput optical and electrical wafer probing solutions
Lead first-silicon bring-up, including defining test content, setting limits, and performing characterization
Drive yield learning through parametric analysis, wafer maps, and statistical techniques
Influence PIC Design-for-Test (DFT) and PDK structures to enhance manufacturability and test scalability
Collaborate with foundries and OSATs to qualify wafer-level optical probe infrastructure
Transition robust test flows into high-volume manufacturing environments
Serve as the technical escalation point for yield or manufacturing issues
Mentor senior engineers and establish best practices for wafer-level test programs
What We’re Looking For
10+ years of experience in PIC test engineering, wafer-level probing, or photonics manufacturing test
Demonstrated ownership of wafer-level optical and electrical test from R&D through HVM
Deep expertise in:
Wafer-level optical probing
Yield learning and spatial analytics
Foundry engagement and factory transfer
Preferred experience influencing PIC DFT and partnering with PDK development teams
Background in high-volume semiconductor or photonics manufacturing environments
Why You’ll Love Working With Us
High-level technical ownership with direct impact on manufacturing
Opportunity to shape how next-generation PICs are tested and brought to scale in production
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.