About this opportunity
Coley S Home Remodeling lists this Principal AI Compiler & Runtime Engineer opportunity in palo alto, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
About The Role
Be part of the team creating the software foundation for next-generation AI compute platforms. In this role, you'll work on compiler technologies, AI runtimes, graph optimization, and hardware-aware execution in close collaboration with inference engineers, ML scientists, and hardware specialists. You'll leverage modern AI technologies and methodologies to accelerate software development, improve software-hardware co-design, and optimize the deployment and execution of AI workloads on next-generation compute platforms.
Location: US (Hybrid)
About The Role
Be part of the team creating the software foundation for next-generation AI compute platforms. In this role, you'll work on compiler technologies, AI runtimes, graph optimization, and hardware-aware execution in close collaboration with inference engineers, ML scientists, and hardware specialists. You'll leverage modern AI technologies and methodologies to accelerate software development, improve software-hardware co-design, and optimize the deployment and execution of AI workloads on next-generation compute platforms.
This position offers the opportunity to contribute to state-of-the-art AI infrastructure, optimize software for emerging AI hardware, and help define how modern machine learning workloads are represented, compiled, and executed at scale.
We are particularly interested in engineers who have applied AI technologies to solve complex systems, compiler, runtime, or hardware challenges, rather than solely using AI as a software productivity tool.
How You'll Contribute
Build and optimize compiler and runtime infrastructure for modern AI workloads
Enable efficient execution of machine learning models across GPUs, NPUs, TPUs, and custom AI accelerators
Apply modern AI technologies and methodologies to improve software development, system optimization, and software-hardware co-design processes
Collaborate with inference, systems, and hardware teams to improve software-hardware co-design
Investigate and resolve performance bottlenecks through profiling, benchmarking, and system-level analysis
Required Skills
BSc, MSc, or PhD in Computer Science, Engineering, Mathematics, or a related discipline
Strong programming skills in C/C++ and/or Python in Linux environments using common development tools
Solid understanding of machine learning fundamentals and modern AI workloads
Experience applying AI technologies to software engineering, performance optimization, and hardware-aware design challenges
Examples of Relevant Backgrounds Include
AI compiler frameworks and infrastructure (e.g., Mojo/Max, MLIR, LLVM, XLA, OpenXLA, Triton, Gluon)
Compiler optimizations such as operator fusion, graph transformations, scheduling, code generation, and lowering pipelines
AI runtimes and execution frameworks (e.g., ONNX Runtime, TensorRT, TVM Runtime, IREE Runtime, XLA)
Deep understanding of AI systems, with experience applying AI technologies to solve engineering, performance, systems, or hardware‑software optimization challenges
Performance optimization of machine learning workloads on GPUs, TPUs, NPUs, DSPs, or custom accelerators
Hardware-aware software development and AI accelerator enablement
Development of high-performance kernels and operators (e.g., GEMMs, convolutions, attention, normalization, quantization)
Distributed AI training or inference systems
Model execution frameworks such as Max, PyTorch, TensorFlow, JAX, or ONNX
Nice to Have
Experience with Modular (Mojo/Max), OpenXLA, StableHLO, Torch-MLIR, Triton, TVM, or IREE
Experience developing software for AI accelerators or machine learning hardware platforms
Contributions to open-source projects such as LLVM, MLIR, PyTorch, OpenXLA, Triton, Gluon, or xDSL
Experience building software for AI accelerators or AI compute platforms
Location & Travel
Hybrid role based in US
Ability to travel periodically for collaboration with global teams and stakeholders
International travel may be required
Compensation & Benefits
200,000 – 350,000 USD
Our benefits package for this position includes medical, dental and vision coverage; 401(k) with Company match; unlimited vacation, paid holidays; paid leave for personal events; parental benefits and employee assistance program.
All compensation and benefits are subject to the terms of the applicable plan documents and Company policies, which may be amended or discontinued at the Company’s discretion. Eligibility for and the value of any bonus or equity award is not guaranteed.
Equal Opportunity
HTEC Group, Inc. is an equal opportunity employer.
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Worksite address
palo alto, CA, 94306, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.