This job is closed
Applications are no longer available for this announcement. Explore current related opportunities below.
Job description
Astera Labs is redefining the connectivity that powers rack-scale AI infrastructure. As a Principal Analog Design Engineer, you will architect and design high-speed analog and mixed-signal circuits that anchor our SerDes, PHY, and high-speed I/O—silicon building blocks moving data at AI speeds.
This hands-on, high-impact role expects end-to-end ownership from concept to silicon bring-up, setting engineering standards, and mentoring teammates as we scale.
#J-18808-Ljbffr
Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.