About this opportunity
MRL Consulting Group | Global Niche Technology Recruitment lists this Principal Analog Design Engineer opportunity in lake oswego, Oregon. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Principal Responsibilities
Lead the design and development of high-performance, ultra-low-power analog and mixed-signal ICs for implantable medical devices, with a focus on reliability, efficiency, and product quality.
Drive the full IC development lifecycle, including architecture definition, specification development, circuit design, simulation, layout, verification, silicon validation, test development, and technical documentation.
Design advanced ultra-low-power analog/mixed-signal building blocks such as voltage/current references, amplifiers, comparators, switched-capacitor circuits, ADCs, DACs, oscillators, power management circuits, and communication interfaces.
Develop low-power digital circuits for timing, control, signal processing, and system interfacing, including state machines, synchronous and asynchronous logic.
Create behavioral and system-level models, perform pre- and post-silicon verification, and collaborate with test engineering teams to develop production test strategies and vectors.
Engage with physicians, clinical researchers, industry experts, and scientific literature to evaluate emerging technologies, clinical needs, and future product opportunities.
Qualifications & Experience
MS or PhD in Electrical Engineering, with strong expertise in analog/mixed-signal IC design, circuit theory, system-level architecture, and analytical problem solving.
8+ years of experience designing low-power analog/mixed-signal ICs for portable, wearable, or implantable applications; medical device industry experience and familiarity with FDA-regulated development processes are highly desirable.
Proven ability to independently drive complex design projects, develop innovative solutions, and communicate effectively through technical presentations and documentation.
Deep understanding of CMOS technologies, transistor-level design, noise, stability, feedback, power optimization, process variation analysis, Monte Carlo simulations, design-for-test, and low-power design methodologies.
Strong experience designing core analog building blocks including op-amps, comparators, references, ADCs, DACs, and power management circuits, with expertise in ultra-low-power layout techniques and production-ready silicon development.
Hands‑on proficiency with Cadence design tools including Virtuoso, Spectre, Xcelium/AMS, Maestro, and mixed‑signal verification flows; experience with scripting languages (Python, Perl, Tcl, Shell), C/C++, and MATLAB is a plus.
Extensive laboratory experience covering silicon characterization, validation, production test development, failure analysis, and support for pre-clinical and clinical environments.
Demonstrated technical leadership through patents, publications, or other industry‑recognized contributions; experience working within global engineering teams is advantageous.
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Worksite address
lake oswego, OR, 97034, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.