About this opportunity
Celero Communications, Inc. lists this Principal Chip PV Lead - Full-Chip Verification opportunity in irvine, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Celero Communications, Inc. is seeking a Principal Physical Verification Engineer to lead the full-chip PV effort at Irvine, CA. You will own execution plans, schedules, and drive milestones toward tapeout readiness, collaborating with analog and block/chip top owners to ensure clean floorplanning.
The role requires 7+ years in full-chip verification, hands-on experience with ICV/Calibre, and deep knowledge of DRC/ER C/PERC rules. Advanced automation skills in Tcl/Python are preferred.
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Worksite address
irvine, CA, 92713, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.