About this opportunity
Navitas Semiconductor Usa lists this Principal Design Engineer opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Job Details: Job Location: Torrance, CA 90503, Position Type: Full Time, Salary Range: $190,000.00 - $230,000.00 Salary/year, Job Purpose: Navitas Semiconductor is seeking a highly motivated and experienced analog / power IC design engineer to lead the architecture, design, and silicon execution of next-generation power management ICs. This role is hands-on and technical, with end-to-end ownership from concept through production, and close collaboration with systems, device, layout, and validation teams. This is a key technical expert position for engineers who have successfully brought power ICs into high-volume production and want to shape future architectures.
Key Responsibilities and Duties:
Lead the architecture, design, and verification of power management ICs from transistor-level blocks to full top-level integration.
Define and evaluate system-level trade-offs for next-generation power supplies in collaboration with applications and systems teams.
Drive IC architecture decisions for products including AC-DC, DC-DC, ACF, LLC, QR, and related power topologies.
Interface closely with device, modeling, and EDA teams to optimize device selection, models, and simulation methodologies.
Guide and review physical layout and floor planning, providing clear feedback to ensure optimal performance, reliability, and manufacturability.
Own tape-out execution, ensuring designs meet performance, schedule, and quality requirements.
Lead silicon bring-up, lab validation, debugging, and correlation versus simulation.
Support yield improvement, failure analysis, and release to production.
Mentor junior designers and contribute to best practices across the design organization.
Qualifications: Knowledge, Skills, Abilities, and Other Characteristics (KSAO’s)
Proven experience as chip lead or technical owner on at least one successful silicon program.
Demonstrated track record of delivering power ICs from concept to high-volume production, including:Architecture definition
Circuit design
Layout supervision
Post-extraction verification
Lab characterization and debug
Yield and failure analysis support
Strong experience in AC-DC and/or DC-DC power IC design.
Deep expertise in analog and mixed-signal building blocks such as:Bandgap references
LDOs
Comparators
Charge pumps
Operational amplifiers
Clear written and verbal communication skills.
Self-motivated, collaborative, and comfortable working in a fast-paced, startup-like environment.
Required Qualifications Basic
Degree in Electrical Engineering, Material Science, Applied Physics or related Fields
Strong understanding of semiconductor device physics, SOA, and power transistors used in high-frequency switching.
Solid knowledge of silicon fabrication processes and their impact on device models and circuit performance.
Preferred:
MSEE + 7+ years or PhD + 5+ years of industry experience in analog or mixed-signal IC design.
Proficiency with EDA tools, including:Cadence Virtuoso / Spectre
Post-parasitic extraction simulation
Monte Carlo and corner analysis
Experience with DFT methodologies, characterization strategies, and production test planning.
Hands-on lab experience with silicon validation, debug, and characterization.
What We Give:
A high visibility opportunity to work on leading edge technology development with a mission to make the world better with advancing the technology that powers the future.
Fast decision making and freedom to work on interesting problems that the world cares about.
A mission to succeed with full support from management.
Health, dental, and vision benefits, unlimited PTO
Total Compensation includes base + bonus and stock awards, depending on experience
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.