About this opportunity
1000 Micron Technology, Inc. lists this Principal Photonics Integration Engineer opportunity in boise, Idaho. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking experienced engineers for Principal, MTS, and SMTS roles. The level at which candidates are hired will be determined by their years of experience, demonstrated technical depth, and overall qualifications
Principal Photonics Integration Engineer
The Advanced Packaging Technology Development (APTD) team is shaping the future of memory, storage, and photonics technologies that power AI, high-performance computing, and next-generation data infrastructure. We collaborate across research, device, process, packaging, and manufacturing organizations to develop innovative solutions that move quickly from concept to production. Join a team where technical challenges are complex, innovation is constant, and your work will directly influence Micron's technology roadmap. As a Principal Photonics Integration Engineer, you will lead the development and integration of silicon photonics and heterogeneous integration technologies that enable high-performance optical connectivity solutions. This role combines process integration, advanced packaging, device development, and program leadership to bring new technologies from concept through manufacturing readiness. You will work across multidisciplinary teams to solve complex technical challenges while employing AI-enabled engineering tools to accelerate development and improve decision-making.
Responsibilities:
Develop and optimize end-to-end process integration flows for silicon photonics technologies from concept through manufacturing readiness
Lead integration and process development for photonic devices, optical interconnects, advanced packaging solutions, and heterogeneous integration architectures
Drive process characterization, DOE execution, yield improvement, defect reduction, root cause investigations, and process optimization activities
Partner with design, device, packaging, manufacturing, and supplier teams to support design rule development, tapeouts, and technology transfers
Lead technical programs, technology roadmaps, and AI-enabled engineering initiatives that improve development efficiency and product performance
Minimum Qualifications:
A PhD in Electrical Engineering, Materials Science, Physics, Photonics, Semiconductor Engineering, or a related field, or equivalent experience, is required along with over 3 years of applicable industry experience.
Alternatively, a Master's degree or comparable experience with more than 5 years of relevant industry background is acceptable.
Candidates holding a Bachelor's degree or equivalent experience and upwards of 7 years in the industry will also be considered.
Experience integrating silicon photonics processes in semiconductor development or manufacturing environments
Strong knowledge of semiconductor process integration, wafer fabrication, process characterization, DOE methodology, and statistical analysis
Experience with process flow architecture, device integration, design rule development, and tape out execution
Demonstrated success leading multi-functional technical projects and using data-driven approaches to solve sophisticated engineering challenges
Preferred Qualifications:
Experience with silicon photonics, III-V semiconductor technologies, and heterogeneous integration platforms
Experience with advanced packaging technologies including hybrid bonding, wafer bonding, optical interposers, co-packaged optics, and optical packaging
Knowledge of optical interconnect technologies for datacenter, networking, AI accelerator, HPC, or memory applications
Experience applying AI, machine learning, advanced analytics, or workflow automation to engineering and manufacturing challenges
Strong communication, program leadership, and project management skills with the ability to influence technical and business collaborators across organizations
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at or (select option #3).
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
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Worksite address
boise, ID, 83708, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.