About this opportunity
Google Inc. lists this RTL Design Engineer for ML Accelerators & ASICs opportunity in sunnyvale, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Google Sunnyvale, CA is seeking a mid-level RTL Design Engineer to shape AI/ML hardware accelerators. You will work on TPU architecture, verify complex digital designs, and collaborate with software teams to deliver high-performance AI workloads.
Requirements include a Bachelor's in EE/CE/CS, 4 years of custom silicon design, RTL design with Verilog/SystemVerilog, and a strong systems mindset. Preferred candidates have advanced degrees and experience in high-performance, low-power design
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Worksite address
sunnyvale, CA, 94087, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.