About this opportunity
Ricursive Intelligence lists this RTL & Design Verification Engineer for AI Chips opportunity in palo alto, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Ricursive Intelligence in Palo Alto is seeking engineers and researchers to join our frontier AI Lab. The role focuses on building self-improving systems, specifically in chip design, and offers the opportunity to tackle high-impact technical challenges alongside an elite team.
Successful candidates will have extensive experience in RTL and design verification, working hands-on to design algorithms and run experiments that aim to transform the chip development process.
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Worksite address
palo alto, CA, 94306, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.