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Job description
NVIDIA Corporation is seeking a Senior Power Integrity Co-Design Engineer in California to architect and deliver di/dt mitigation across silicon, package, board, and platform. You will translate noise targets into shipped specifications and feed silicon findings into the next generation's build.
This role requires strong systems thinking, the ability to navigate ambiguity, and hands-on bench work with scopes, probes, and DAQ, plus simulator-driven verification.
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Worksite address
santa clara, CA, 95053, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.