About this opportunity
Teradyne lists this Senior Analog Design Engineer (Teradyne, Agoura Hills, CA)) opportunity in agoura hills, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
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Date: Aug 5, 2026
Location: Agoura Hills, CA, US
We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together,Teradyne companies deliver manufacturing automation across industries and applications around the world!
We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.
Our Purpose
TERADYNE , where experience meets innovation and driving excellence in every connection.We are fueled by creativity and diversity of thoughtandin our workforce. Our employees aresupportedto innovateandlearnsomething new every day.
We cultivate a culture of inclusion for all employees thatrespectstheir individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drivesinnovationand delivers better business results.
Opportunity Overview
Teradyne’s Semiconductor Test Division in Agoura Hills, CA is looking for an enthusiastic candidate for the position of Senior Analog Design Engineer, to design low high-speed circuits in mixed-signal ICs for ATE (Automatic Test Equipment) instruments. We are looking for a candidate with experience in FINFET, general CMOS, and BCD technologies.
Responsibilities include:
Develop detailed circuit specifications for mixed signal circuits
Conceive circuit architectures and transistor level circuit topologies that satisfy required performance
Physical implementation (layout) of high speed circuits, either directly or assisting.
Optimization of circuits via simulation (with Cadence EDA tools) over all process and operating conditions
Integration of circuit elements into large analog/mixed signals ASICs
Participation in the characterization of ASIC circuits.
All About You
We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. Ifyou’reready to join usinthis mission, take a closer look at theminimumcriteria for the position.
MSEE with 5 years of experience or PhD in electrical engineering with 3 years experience in the design and characterization of multiple, high frequency and high scale of integration mixed signal integrated circuits
Thorough knowledge of high frequency, broad-band Analog Mixed-Signal IC design – both electrical and physical design
Desire experience in design of VCOs, PLLs, DLLs, ADCs, DACs, clock and data recovery, broadband amplifiers, bias generators, clock distribution networks, high frequency I/Os, high frequency CML designs, high voltage, power circuits
Solid understanding of CMOS semiconductor device physics and device modeling
Solid understanding of electromagnetic theory
Solid understanding of transmission line theory
Solid understanding of thermal effects of various circuit topologies and different package types
Involvement in all phases of multiple IC developments from specification to product introduction
Experience with Cadence Skill or Ocean scripting for automating test benches is a plus.
Proficiency in Verilog or Verilog-A modeling is highly desired.
Generic experience in deep sub-micron CMOS (nodes Experience in BCD technology is a plus
Experience with high voltage and/or mixed voltage domain circuit design is desired
Solid understanding and experience with IC characterization at high frequencies using high speed sampling oscilloscopes, spectrum analyzers, VNAs, signal sources
Solid understanding of working with PDKs
Experience with ATE test development is a plus
Ability to work well with a team
We are anequal-opportunityemployer and value diversity at our company. We do not discriminateon the basis ofrace, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation toparticipatein the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment.
Compensation:
The base salary range for this role is$119,200 to $190,700.This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.
Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.
Benefits: Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.
Nearest Major Market: Los Angeles
Job Segment: Thermal Engineering, Design Engineer, Electrical Engineering, Electrical, Manufacturing Engineer, Engineering
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Worksite address
agoura hills, CA, 91375, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.