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Job description
A technology consulting firm is seeking an Analog Layout Engineer in San Francisco to design and implement high-performance integrated circuits for AI applications. The ideal candidate has over 8 years of experience in analog layout design, proficiency with verification tools, and strong organizational skills. Offered benefits include competitive pay, comprehensive insurance, and career advancement opportunities.
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.