About this opportunity
Anysilicon lists this Senior ASIC Design Engineer opportunity in batavia, Illinois. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Fermilab, 16 Potawatomi Blvd, Batavia, IL 60510
Job Description:
Fermilab is seeking a Senior ASIC Design Engineer to lead the development of custom analog and mixed-signal integrated circuits for scientific instrumentation in extreme environments. The role involves collaboration with multidisciplinary teams to deliver innovative solutions for next-generation scientific applications.
Responsibilities:
Lead the design and development of custom analog, RF, and mixed-signal ASICs from concept through silicon validation.
Develop system architectures, ASIC specifications, and circuit implementations based on application requirements.
Design high-performance analog and RF building blocks, including low-noise amplifiers and data converters.
Develop behavioral models and simulation environments to support mixed-signal verification.
Perform transistor-level circuit design, simulation, optimization, and post-layout verification using EDA tools.
Develop custom IC layouts and perform physical verification, including DRC and LVS.
Collaborate with digital ASIC designers, system engineers, and other stakeholders to implement complete mixed-signal ASIC solutions.
Develop ASIC test plans and work with the test engineering team to characterize fabricated devices and debug silicon.
Mentor junior engineers and provide technical leadership on ASIC development projects.
Prepare technical documentation and contribute to proposals, publications, and presentations.
Evaluate and adopt emerging semiconductor technologies and design methodologies.
Qualifications:
PhD or MS in Electrical Engineering or Physics with a background in solid state circuits and integrated circuit design.
2 years (Ph.D.) or 5 years (M.S.) of professional experience in analog integrated circuit design.
Skills:
Strong knowledge of analog CMOS integrated circuit design principles.
Experience designing transistor-level analog integrated circuits in CMOS technologies.
Familiarity with mixed-signal ASIC design and integration.
Proficiency in developing behavioral models and performing analog and mixed-signal simulations.
Experience with IC layout, physical verification, and post-layout extraction.
Ability to lead complex ASIC design activities and communicate technical concepts clearly.
Tell us what you're building and we'll recommend qualified vendors for your project.
ASIC Design Services
Verification
Packaging & Wafer
Semiconductor IP
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Tell us what you're building and we'll recommend qualified vendors for your project.
ASIC Design Services
Verification
Packaging & Wafer
Semiconductor IP
Work Email
Free No obligation Response within 24 hours
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Worksite address
batavia, IL, 60510, US
Who can apply
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