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Job description
Annapurna Labs, an organization within Amazon, is seeking an ASIC Physical Design Methodology Engineer in Austin, TX to advance hardware design for ML accelerator chips. You will develop RTL2GDS flows, optimize CAD toolchains, and work with RTL, Physical, and Package teams to improve QoR and design reliability.
The role requires strong scripting abilities (Python/TCL) and extensive experience in ASIC, digital design, and post-silicon verification.
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Worksite address
austin, TX, 78716, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.