About this opportunity
TSMC - Taiwan Semiconductor Manufacturing Company Limited lists this Senior ASIC/SoC Physical Design Engineer | P&R & Signoff opportunity in town of texas, Wisconsin. Review the employer’s description below for duties, qualifications and application requirements.
Job description
TSMC is seeking a Sr. Physical Design Engineer to own the RTL-to-GDS physical implementation flow, including synthesis, floorplanning, place-and-route, CTS, STA and signoff from its Austin Design Center, Texas. The role operates on a hybrid schedule with four days in the office.
The successful candidate will lead block-level implementation, perform timing closure and signoff, and work closely with customers at the North Austin site on advanced node flows and EDA tool chains.
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Who can apply
Review the original listing for work authorization, qualifications and employer requirements.