About this opportunity
Eridu Corporation lists this Senior ASIC Validation Engineer – Networking & Chiplet SoCs opportunity in saratoga, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
A Silicon Valley-based hardware startup is looking for a highly experienced Post-Silicon ASIC Validation Engineer. The role involves leading validation of complex networking ASICs and chiplet-based architectures. The ideal candidate has strong expertise in post-silicon validation and high-speed interconnects. This position offers a chance to work on groundbreaking technology impacting AI infrastructure. The pay range for this role is $185,000 - $250,000 per year, reflecting the contribution to innovative AI performance enhancements.
#J-18808-Ljbffr
Worksite address
saratoga, CA, 95071, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.