About this opportunity
NVIDIA Corporation lists this Senior Circuit Design Engineer: Noise & Timing Expert opportunity in santa clara, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
NVIDIA Corporation in Santa Clara, CA seeks a Senior Circuit Design Engineer to advance digital, mixed-signal, and analog IPs across silicon. You will partner with global teams to optimize timing, noise, and power, drive prototypes, and mentor junior engineers.
You should have a BSEE or MS in EE with 8+ years of experience in deep submicron design, Spice simulations, and RTL/Place and Route. NVIDIA offers equity and comprehensive benefits in a hybrid work environment.
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Worksite address
santa clara, CA, 95053, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.