About this opportunity
TSMC - Taiwan Semiconductor Manufacturing Company Limited lists this Senior Defect Modeling & Testing Architect opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
A leading semiconductor foundry is seeking a Technical Manager to drive advanced defect modeling and testing in semiconductor packaging. The successful candidate will have over 15 years of experience in defect physics and testing, and will be responsible for developing methodologies and collaborating across teams to optimize performance. This role offers a competitive salary and the opportunity to influence semiconductor innovation.
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.