About this opportunity
MetAntz lists this Senior DFT Engineer - SoC Test & Bring-Up opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
QFocus Technologies in Sunnyvale, CA seeks a Senior DFT Engineer to define, architect, and execute robust DFT strategies for high-performance SoCs and ASICs, collaborating with front-end, physical design, verification, and product teams.
You will implement scan, ATPG, MBIST, and JTAG flows, optimize test coverage, support post-silicon bring-up, and drive test efficiency and silicon yield. Proficiency in Verilog/SystemVerilog and memory test techniques required.
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.