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Job description
Brookhaven National Laboratory in Upton, NY is seeking a Senior Digital ASIC Design Engineer to lead architecture, RTL, and integration of complex readout ASICs and SOCs for scientific instrumentation and high-energy physics experiments. You will collaborate with physicists, engineers, and firmware teams to deliver radiation-tolerant, low-power digital blocks for detector readout and timing distribution.
The role requires seven years of experience in digital ASIC design, SystemVerilog/Verilog
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Worksite address
new york, NY, 10261, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.