About this opportunity
MoTek Technologies lists this Senior Digital ASIC / FPGA Design Engineer opportunity in oakland, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Digital ASIC / FPGA Design Engineer
Responsibilities:
Implementation of entire design flow from RTL to GDS
Perform verification planning and firmware based verification
Validation and Scan test vectors and BIST implementation
Logic synthesis, simulation setup and debugging
Behavior modelling using Verilog and/or Verilog-AMS
Requirements:
MSEE + 8 years of industry experience or PhD + 5 years ASIC/FPGA Design
ASIC & FPGA background with hands-on, high-speed digital design
MUST HAVE Verilog and System Verilog experience
Mixed mode simulation, STA (Static Timing Analysis) and logic synthesis
Synopsys and/or Quartus experience is required
Signal processing experience is also a +
Must have good team work attitude and be able to work under pressure.
Nice to have:
MATLAB
C/C++ Programming
Robotics experience
PLEASE SEND YOUR RESUME TO:
KeywordPhrases Include: Hardware Design, ASIC, Application Specific Integrated Circuits, FPGA, Field Programmable Gate Array, VHDL, Verilog, Digital Signal Processing, DSP, Payloads, Altera, Robotics, Autonomous Vehicles, Sensors, deep convolutional neural networks, training and inference, object detection, point cloud libraries, Robot Operating system.
Worksite address
oakland, CA, 94666, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.