Senior DRAM Physical Design Architect — Tapeout & Signoff Lead

Job description

Micron Technology in Boise is seeking a Principal Physical Design Engineer to lead DRAM digital design implementation and signoff from RTL through tapeout, with a strong emphasis on timing closure, power integrity, EMIR analysis, and design reliability.

You will collaborate with architecture, RTL, implementation, CAD, and technology teams to develop scalable physical design solutions that achieve PPA targets for next-generation memory products, while mentoring engineers and driving methodology

#J-18808-Ljbffr

Worksite address

boise, ID, 83708, US

Who can apply

Review the original listing for work authorization, qualifications and employer requirements.