About this opportunity
Eliyan lists this Senior DSP Architect - High-Speed SerDes & Chiplet IP opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
A leading chiplet startup is seeking a Principal Systems/DSP Engineer to define and drive DSP architecture for next-generation 224G and 448G SerDes designs. You will be responsible for end-to-end system modeling, equalization algorithm development, and CDR architecture. The ideal candidate has over 10 years of experience in DSP systems, particularly in high-speed serial communications, and must possess a Masters or PhD in Electrical or Computer Engineering. A fun work environment with excellent benefits is offered.
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.