About this opportunity
Cadence Design Systems lists this Senior EDA Software Engineer (C++ Characterization) opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Cadence Design Systems in California is seeking an experienced senior software engineer to advance transistor-level timing analysis tools. You will extend architecture, build new frameworks for detailed analysis, and apply machine learning to boost speed and usability across the existing suite.
The role requires deep C++ expertise on Linux, strong data-structures and algorithms skills, and a BS in CS/EE/CE. Competitive compensation and comprehensive benefits are offered.
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.