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Analog Devices

Senior Engineer, Physical Design Engineering (ASIC)

somerset, NJ

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About this opportunity

Analog Devices lists this Senior Engineer, Physical Design Engineering (ASIC) opportunity in somerset, New Jersey. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Senior Physical Design EngineerAnalog Devices, Inc. is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible.As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC designs. You will work across the physical design flow, from floorplanning through place-and-route, timing closure, physical verification, and tapeout support, helping turn architectural and RTL intent into robust silicon implementation. This role requires strong technical depth in physical design, the ability to solve complex implementation challenges, and effective collaboration with cross-functional teams across the development cycle.Key ResponsibilitiesOwn physical design implementation for complex digital blocks and subsystems, including floorplanning, placement, clock tree synthesis, routing, and physical optimizationDrive timing closure, congestion analysis, power optimization, and area improvement across assigned blocks or subsystemsPerform physical verification activities including DRC, LVS, ERC, and reliability checks in collaboration with relevant teamsDevelop and refine physical design constraints, scripts, and flow improvements to improve quality and execution efficiencyCollaborate closely with RTL, design verification, DFT, STA, library, and package teams to resolve design and implementation issuesSupport block-level and top-level integration activities, including interface planning, timing constraint alignment, and implementation readinessAnalyze and debug timing, signal integrity, power, and physical implementation issues across the full backend flowContribute to methodology improvements and help establish best practices for physical design executionParticipate in design reviews and provide clear technical input on implementation trade-offs, risks, and readinessAuthor and maintain documentation for design implementation, constraints, flows, and signoff statusMentor junior engineers on physical design practices, tool usage, and debugging approachesSupport tapeout planning and execution activities to ensure high-quality delivery against project milestonesMust Have SkillsStrong experience in physical design for ASIC/SoC development, including successful implementation through tapeoutExpertise in floorplanning, place-and-route, clock tree synthesis, timing closure, and physical verificationStrong understanding of timing analysis, constraints, signal integrity, power optimization, and physical design trade-offsExperience with industry-standard physical design and signoff tools, including Cadence-based flowsScripting experience in TCL, Python, or similar languages for automation and flow improvementExperience collaborating across cross-functional teams including RTL, STA, DFT, design verification, and package or product engineeringStrong problem-solving and debug skills across backend implementation challengesClear communication and technical documentation skillsDemonstrated ability to independently drive complex blocks or major implementation workstreamsPreferred QualificationsExperience with advanced-node implementation and low-power design methodologiesFamiliarity with mixed-signal integration considerations and top-level implementation challengesExperience improving backend flows, automation, or methodologyPrior mentoring experience or informal technical leadership on project executionPreferred Education and ExperienceBachelor's degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experienceMaster's degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experienceWe recognize that candidates may not meet every listed requirement. If you bring relevant experience and a willingness to learn, we encourage you to apply.

Worksite address

somerset, NJ, 08873, US

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